The ISA Is a Contract, Not a Benchmark: What the Instruction Set Still Costs You in 2026

Four decades of micro-op convergence absorbed the classic textbook differences between RISC and CISC, but the instruction set still bills you in three places you cannot optimize away: memory ordering contracts, frontend silicon budgets, and ecosystem sovereignty.

October 1, 2026 · 11 min · Hanh Pham

Apple M4 vs Huawei Ascend 950: Two Theories of the AI Chip

One is a fixed-function FP16 block hidden inside a laptop chip Apple won’t document. The other is a programmable FP4 datacenter engine Huawei ships in 8,192-chip fabrics. Same goal, opposite theses: here’s what the M4 family actually is, and what the numbers do and don’t mean against the Ascend 950.

September 9, 2026 · 12 min · Hanh Pham

Huawei's Ascend 950 & DaVinci v3: How China Built a Competitive AI Chip Without EUV

DeepSeek just ordered 160,000 Huawei Ascend 950DT chips: a chip built on a DUV-only process, with self-developed HBM and a homegrown interconnect, because export controls left no other choice. Here’s how the thing actually works, and where it still falls short.

September 7, 2026 · 20 min · Hanh Pham